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History of VHDL 

 

    VHDL was developed by the VHSIC (Very High Speed Integrated

Circuit) Program in the late 1970s and early 1980s

 

   The VHSIC program was funded by the U.S. Department of Defense

 

   Existing tools were inadequate for complex hardware designs

 

 

    The evolution of VHDL has included the following milestones:

 

   In 1981, VHDL was first proposed as a hardware description language

 

   In 1986, VHDL was proposed as an IEEE standard

 

   In 1987, the first VHDL standard (IEEE-1076-1987) was adopted

 

   In 1993, a revised VHDL standard (IEEE-1076-1993) was adopted

 

   In 2002, the current VHDL standard (IEEE-1076-2002) was adopted

 

 

    VHDL is now used extensively by industry and academia for the purpose of simulating and synthesizing digital circuit designs

 

 

The Standardization of VHDL 

 

     IEEE 1076-1987

 

    Standard VHDL Language Reference Manual [Out of Print]  

 

 

     IEEE 1076 INTERPRETATIONS-1991

 

    Standard VHDL Language Reference Manual Interpretations [1-55937-181-1]  

 

 

     IEEE 1076-1993

 

    Standard VHDL Language Reference Manual [1-55937-376-8]  

 

 

     IEEE 1076-2000

 

    Standard VHDL Language Reference Manual [0-7381-3326-4]  

 

 

     IEEE 1076-2002

 

    Standard VHDL Language Reference Manual [0-7381-3247-0]  

 

Extensions to VHDL 

 

     IEEE 1076.1-1999

 

    IEEE Standard VHDL Analog and Mixed-Signal Extensions [0-7381-1640-8]  

 

 

     IEEE 1076.2-1996

 

    IEEE Standard VHDL Mathematical Packages [1-55937-894-8]  

 

 

     IEEE 1076.3-1997

 

    IEEE Standard VHDL Synthesis Packages [1-55937-923-5]  

 

 

     IEEE 1076.4-1995

 

    IEEE Standard VITAL ASIC Modeling Specification [1-55937-691-0]  

 

 

     IEEE 1076.5-xxxx

 

    IEEE Standard VHDL Utilities Packages [Not Standardized]  

 

 

     IEEE 1076.6-1999

 

    IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis [0-7381-1819-2]  

 

 

Related IEEE Standards     

 

     IEEE 1164-1993

 

    Standard Multivalue Logic System for VHDL Model Interoperability [1-55937-299-0]  

 

 

     IEEE 1364-1995

 

    IEEE Standard Description Language Based on the Verilog Hardware Description

Language [1-55937-727-5]  

 

 

 

 


 

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