VHDL Tutorial

VHDL lexical elements and syntax
Fundamental concepts
Modelling concepts
Elements of behaviour
Elements of structure
Analysis elaboration
Lexical elements

Characters and strings 
Syntax descriptions
Constants and variables
Scalar type
Integer types
Floating point types
Time type
Enumeration types
Character types
Boolean type 
Bits type
Standard logic
Sequential statements
Case statements
Loop and exit statements
Assertion statements
Array types & array operations
Architecture bodies
Entity declarations
Behavioral descriptions 
Wait statements
Delta delays
Process statements
Conditional signal assignment 
Selected signal assigment
Structural descriptions
Library and library clauses
Procedure parameters
Signal parameters
Default values
Unconstrained array parameter
Package declarations and bodies
Subprograms in package
Use clauses
Resolved signals and subtypes
Resolved signals and ports
Parameterizing behavior
Parameterizing structure


Lexical Elements and Syntax


When we learn a new language, we need to learn how to write the basic elements, such as numbers and identifiers.   We also need to learn the syntax, that is, the gram- mar rules governing how we form language constructs.   We will briefly describe the lexical elements and our notation for the grammar rules, and then start to introduce langauge features.

VHDL uses characters in the ISO 8859  Latin-1 8-bit character set.   This includes uppercase and lowercase letters (including letters with diacritical marks, such as ,

and so forth), digits 0 to 9, punctuation and other special characters.


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When we are writing a hardware model in VHDL, it is important to annotate the code with comments.   A VHDL model consists of  a  number of lines of text.   A comment can be added to a line by writing two dashes together, followed by the comment text. For example:


a line of VHDL description     a descriptive comment


The comment extends from the two dashes to the end of the line and may include

any  text  we  wish,  since  it  is  not  formally  part  of  the  VHDL  model The  code  of  a model can include blank lines and lines that only contain comments, starting with two dashes.   We  can  write  long  comments  on  successive  lines,  each  starting  with  two dashes, for example:


The following code models

the control section of the system

some VHDL code