89c51 tutorial 89c51 pin description

Feature and Descriptions of 89c51
89C51-pin diagram
89c51-block diagram
89c51-Pin Description
89c51-Oscillator Characteristics
89c51-Power Down Mode 
89c51-Programming the Flash
89c51-Programming Interface


 

 

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Pin Description

 

VCC

Supply voltage.

 

GND

Ground.

 

Port 0

 

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal pullups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pullups are required during program verification.

 

Port 1

 

Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source

current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes during Flash programming and program verification.

 

Port 2

 

Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pullups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

 

Port 3

 

Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C51 as listed below:

 

 

Port 3 also receives some control signals for Flash programming and Programming verification.

 

RST

 

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

 

ALE/PROG

 

Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory.

This pin is also the program pulse input (PROG) during Flash programming.

In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data

Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin isweakly pulled high. Setting the ALE-disable bit has no effect if the microcrontroller is in external execution mode.

 

PSEN

 

Program Store Enable is the read strobe to external program memory.  When the AT89C51 is executing code from external program memory, PSEN is  ctivated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

 

EA/VPP

 

External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will beinternally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable

voltage (VPP) during Flash programming, for parts that require 12-volt VPP.

 

XTAL1

 

Input to the inverting oscillator amplifier and input to the internal clock  operating circuit.

XTAL2

 

Output from the inverting oscillator amplifier.

 

 

 

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